EP20K400GC655-1 vs EP20K400BC652-1X Comparison
Detailed side-by-side comparison of EP20K400GC655-1 by Intel and EP20K400BC652-1X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoleteIntel
EP20K400BC652-1X - APEX 20KE FPGA 400K Gates 652-BGA | Intel
EP20K400BC652-1X β Last Time BuySpecification Comparison
| Parameter | EP20K400GC655-1 | EP20K400BC652-1X |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $135.00 | $140.00 |
| Family | APEX 20K | APEX 20K |
| Series | EP20K400 | APEX 20KE |
| Logic Elements | 16,640 | β |
| Maximum Gates | 1,052,000 | β |
| Typical Gates | 400,000 | β |
| Embedded System Blocks (ESBs) | 4 | β |
| Total RAM Bits | 212,992 | β |
| Maximum User I/O | 502 | 502 |
| Dedicated Inputs | 6 | 4 |
| Process Technology | 0.22 Β΅m CMOS | 0.22 um CMOS |
| Core Supply Voltage | 2.5 V | β |
| I/O Supply Voltage | 3.3 V | β |
| Maximum Internal Frequency | 250 MHz | β |
| Propagation Delay | 2.5 ns | β |
| Package | 655-pin CPGA (Ceramic Pin Grid Array) | 652-ball PBGA (45 x 45 mm, 1.27 mm pitch) |
| Pin Count | 655 | β |
| Mounting Type | Through-Hole | Surface Mount |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | Industrial (per datasheet) |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | β |
| Boundary Scan | IEEE 1149.1 (JTAG) | β |
| RoHS Status | Non-compliant (contains lead in ceramic package) | [DATA_NEEDED: RoHS status not stated in retrieved snippets] |
| Logic Elements / Cells | β | 16,640 |
| System Gates | β | 400,000 |
| Embedded Memory (bits) | β | 212,992 |
| Embedded Array Blocks (EABs) | β | 104 x 2,048 bits |
| PLLs | β | 4 |
| DLLs | β | 4 |
| Maximum Frequency | β | 250 MHz |
| Propagation Delay (pin-to-pin) | β | 2.5 ns |
| Core Voltage | β | 2.5 V |
| I/O Standard Support | β | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS |
| Programming Interface | β | IEEE 1149.1 JTAG |