EP20K400GC655-1 vs EP20K400GC652-1XV Comparison
Detailed side-by-side comparison of EP20K400GC655-1 by Intel and EP20K400GC652-1XV by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 Obsolete
Specification Comparison
| Parameter | EP20K400GC655-1 | EP20K400GC652-1XV |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $135.00 | $190.00 |
| Family | APEX 20K | APEX 20K |
| Series | EP20K400 | β |
| Logic Elements | 16,640 | β |
| Maximum Gates | 1,052,000 | β |
| Typical Gates | 400,000 | β |
| Embedded System Blocks (ESBs) | 4 | β |
| Total RAM Bits | 212,992 | β |
| Maximum User I/O | 502 | 502 |
| Dedicated Inputs | 6 | β |
| Process Technology | 0.22 Β΅m CMOS | β |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 3.3 V | β |
| Maximum Internal Frequency | 250 MHz | β |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Package | 655-pin CPGA (Ceramic Pin Grid Array) | β |
| Pin Count | 655 | β |
| Mounting Type | Through-Hole | Surface Mount |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 C to +85 C |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | β |
| Boundary Scan | IEEE 1149.1 (JTAG) | β |
| RoHS Status | Non-compliant (contains lead in ceramic package) | Compliant (lead-free, V suffix) |
| Logic Elements (Macros) | β | 1664 |
| Typical System Gates | β | 400,000 |
| Embedded SRAM | β | 212,992 bits |
| Logic Family | β | CMOS |
| Package Type | β | BGA-652 (thermally enhanced) |
| Speed Grade | β | -1 (standard) |
| Architecture | β | MultiCore (LUT + EAB + FastTrack interconnect) |
| Programming Interface | β | JTAG (IEEE 1149.1) / passive serial |