EP20K400GC655-2V vs EP20K400GC655-3 Comparison
Detailed side-by-side comparison of EP20K400GC655-2V by Altera and EP20K400GC655-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera
EP20K400GC655-2V β Last Time BuySpecification Comparison
| Parameter | EP20K400GC655-2V | EP20K400GC655-3 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.75 | $310.00 |
| Series | APEX-20KC | APEX-20KC |
| Family | APEX 20KC (1.8 V, LVDS) | APEX 20K |
| Logic Elements | 16,640 | 16640 |
| Total RAM Bits | 212,992 | 212992 |
| System Gates | ~400,000 (typical marketing figure) | β |
| Number of I/O | [DATA_NEEDED: I/O count] | β |
| Core Voltage (VCCINT) | 2.375 V to 2.625 V (nominal 2.5 V) | β |
| Propagation Delay | 3.000 ns | β |
| Process Technology | CMOS, 0.18 um | 0.22 um CMOS |
| LVDS Support | Yes | β |
| Package | 655-CPGA (62.48 x 62.48 mm) | β |
| Package Type | Ceramic Pin Grid Array, through-hole | β |
| Mounting Type | Through-hole (CPGA) | β |
| Speed Grade | -2 | -3 (slowest grade in family) |
| Operating Temperature | [DATA_NEEDED: temperature grade] | -40C to +85C (industrial) |
| RoHS Status | unknown | [DATA_NEEDED: rohs status] |
| Lead-Free | unknown | β |
| Architecture | MultiCore (LUT + product-term + embedded memory) | β |
| Manufacturer | β | Intel (formerly Altera) |
| Number of Gates | β | 400000 |
| Supply Voltage - Core | β | 1.71 V to 1.89 V (1.8 V nominal) |
| I/O Voltage Tolerance | β | MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V |
| Maximum Frequency | β | 167 MHz (per FPGAkey) |
| Package / Case | β | 655-BCPGA |
| Supplier Device Package | β | 655-CPGA (62.48 x 62.48 mm) |
| Propagation Delay (tPD) | β | 3.6 ns (per Microchip USA listing) |
| JTAG Support | β | IEEE 1149.1 Boundary-Scan |
| Configuration Modes | β | Passive Serial, Passive Parallel Sync/Async, Active Serial |