EP20K400GC655-2V vs EP20K400GI655-2 Comparison
Detailed side-by-side comparison of EP20K400GC655-2V by Altera and EP20K400GI655-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera
EP20K400GC655-2V β Last Time BuySpecification Comparison
| Parameter | EP20K400GC655-2V | EP20K400GI655-2 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.75 | $175.00 |
| Series | APEX-20KC | APEX 20K (EP20K400) |
| Family | APEX 20KC (1.8 V, LVDS) | β |
| Logic Elements | 16,640 | β |
| Total RAM Bits | 212,992 | β |
| System Gates | ~400,000 (typical marketing figure) | β |
| Number of I/O | [DATA_NEEDED: I/O count] | β |
| Core Voltage (VCCINT) | 2.375 V to 2.625 V (nominal 2.5 V) | β |
| Propagation Delay | 3.000 ns | 3.1 ns (typical) |
| Process Technology | CMOS, 0.18 um | β |
| LVDS Support | Yes | β |
| Package | 655-CPGA (62.48 x 62.48 mm) | SPGA-655 (47 mm x 47 mm) |
| Package Type | Ceramic Pin Grid Array, through-hole | β |
| Mounting Type | Through-hole (CPGA) | Through-Hole / Socket |
| Speed Grade | -2 | β |
| Operating Temperature | [DATA_NEEDED: temperature grade] | -40C to +85C (industrial) |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free | unknown | β |
| Architecture | MultiCore (LUT + product-term + embedded memory) | β |
| Manufacturer | β | Altera Corporation |
| Device Type | β | Field Programmable Gate Array (FPGA) |
| Typical Gate Count | β | 400,000 gates |
| Logic Elements (LE) | β | 16,640 |
| Maximum User I/O | β | 496 |
| Dedicated Inputs | β | 6 |
| Number of Terminals | β | 655 |
| Nominal Supply Voltage | β | 2.5 V |
| Supply Voltage Range | β | 2.375 V to 2.625 V |
| Technology | β | CMOS SRAM |
| Moisture Sensitivity Level | β | 1 (per Altera family) |
| Configuration Method | β | JTAG, Passive Serial, Passive Parallel |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, GTL+ |
| Embedded Memory | β | Embedded System Blocks (ESBs) |
| Lifecycle Status | β | Obsolete (legacy Altera APEX 20K family) |