EP20K400GC655-2X vs EP20K400GI655-1X Comparison

Detailed side-by-side comparison of EP20K400GC655-2X by Altera and EP20K400GI655-1X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400GC655-2X EP20K400GI655-1X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $175.00 $160.00
Family APEX 20K APEX 20K
Series APEX-20KCยฎ โ€”
Logic Elements / Cells 16640 โ€”
System Gates 400000 โ€”
Total RAM Bits 212992 โ€”
Number of I/O 496 โ€”
Number of Dedicated Inputs 6 โ€”
Number of LABs/CLBs [DATA_NEEDED: number of Logic Array Blocks] โ€”
Number of EABs [DATA_NEEDED: number of Embedded Array Blocks] โ€”
Maximum Operating Frequency 200 MHz โ€”
Process Technology 0.22 ยตm CMOS CMOS, SRAM-based configuration
Core Supply Voltage 2.5 V โ€”
I/O Supply Voltage (MultiVolt) 2.5 V / 3.3 V / 5 V โ€”
Package Type 655-BCPGA (SPGA655) Ceramic Pin Grid Array (CPGA)
Package Body Material CERAMIC, metal-sealed cofired grid array CERAMIC (metal-sealed co-fired)
Package Dimensions 47 x 47 mm โ€”
Peak Reflow Temperature 220 ยฐC 220 C
Mounting Type Through-hole (CPGA) Through-Hole (PGA)
Programmability In-system, JTAG (IEEE 1149.1) โ€”
Operating Temperature [DATA_NEEDED: temperature grade] -40 C to +85 C (industrial)
RoHS Status unknown Compliant
Device โ€” EP20K400
Logic Elements โ€” 16640
Number of Terminals โ€” 655
User I/O Lines โ€” 502
Dedicated Inputs โ€” 4
Package Code (JESD-30) โ€” S-CPGA-P655
Package Equivalence Code โ€” SPGA655,47X47
Speed Grade โ€” -1
Propagation Delay โ€” 2.5 ns (typical for -1 grade)
Moisture Sensitivity Level (MSL) โ€” 1

Datasheets & Resources

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