EP20K400GI655-1V vs EP20K400GI655-1 Comparison
Detailed side-by-side comparison of EP20K400GI655-1V by Intel and EP20K400GI655-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V β Last Time BuySpecification Comparison
| Parameter | EP20K400GI655-1V | EP20K400GI655-1 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $155.00 | $195.00 |
| Family | APEX 20K | APEX 20K |
| Typical Gates | 400,000 | 400000 |
| Logic Elements | 16,640 | 16640 |
| Maximum User I/O | 502 | 502 |
| Dedicated Inputs | 4 | 4 |
| Package Type | CBGA-655 (Ceramic Ball Grid Array) | Ceramic Pin Grid Array (CPGA-655) |
| Package Code (JESD-30) | S-CPGA-P655 | β |
| Package Equivalence Code | SPGA655, 47x47 | β |
| Process Technology | CMOS | β |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Core Supply Voltage | 2.5 V | β |
| I/O Supply Voltage | 2.5 V / 3.3 V | β |
| Configuration | In-system programmable via JTAG | β |
| Boundary Scan | IEEE 1149.1 JTAG | β |
| Operating Temperature | [DATA_NEEDED: industrial vs military grade] | -40C to +85C (Industrial) |
| MSL Level | 1 | β |
| Package Body Material | Ceramic | β |
| RoHS Status | [DATA_NEEDED] | Compliant |
| Device Series | β | EP20K400 |
| Technology | β | CMOS, SRAM-based |
| Total Terminals | β | 655 |
| JESD-30 Package Code | β | S-CPGA-P655 |
| Moisture Sensitivity Level | β | MSL 1 |
| Peak Reflow Temperature | β | 220 C |
| Programmability | β | In-system, JTAG boundary-scan (IEEE 1149.1) |
| Process Node | β | 0.18 micrometer CMOS |