EP20K400GI655-1X vs EP20K400GI655-1V Comparison

Detailed side-by-side comparison of EP20K400GI655-1X by Altera and EP20K400GI655-1V by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Intel
EP20K400GI655-1V EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel

EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel

EP20K400GI655-1V ⚠ Last Time Buy

Specification Comparison

Parameter EP20K400GI655-1X EP20K400GI655-1V
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $160.00 $155.00
Family APEX 20K APEX 20K
Device EP20K400 β€”
Logic Elements 16640 16,640
Number of Terminals 655 β€”
User I/O Lines 502 β€”
Dedicated Inputs 4 4
Package Type Ceramic Pin Grid Array (CPGA) CBGA-655 (Ceramic Ball Grid Array)
Package Code (JESD-30) S-CPGA-P655 S-CPGA-P655
Package Equivalence Code SPGA655,47X47 SPGA655, 47x47
Package Body Material CERAMIC (metal-sealed co-fired) Ceramic
Speed Grade -1 β€”
Propagation Delay 2.5 ns (typical for -1 grade) 2.5 ns
Process Technology CMOS, SRAM-based configuration CMOS
Moisture Sensitivity Level (MSL) 1 β€”
Peak Reflow Temperature 220 C β€”
Operating Temperature -40 C to +85 C (industrial) [DATA_NEEDED: industrial vs military grade]
Mounting Type Through-Hole (PGA) β€”
RoHS Status Compliant [DATA_NEEDED]
Typical Gates β€” 400,000
Maximum User I/O β€” 502
Core Supply Voltage β€” 2.5 V
I/O Supply Voltage β€” 2.5 V / 3.3 V
Configuration β€” In-system programmable via JTAG
Boundary Scan β€” IEEE 1149.1 JTAG
MSL Level β€” 1

Datasheets & Resources

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