EP20K400GI655-2 vs EP20K400GI655-2X Comparison

Detailed side-by-side comparison of EP20K400GI655-2 by Altera and EP20K400GI655-2X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400GI655-2 EP20K400GI655-2X
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $175.00 $195.00
Manufacturer Altera Corporation β€”
Series APEX 20K (EP20K400) APEX-20K
Device Type Field Programmable Gate Array (FPGA) β€”
Typical Gate Count 400,000 gates β€”
Logic Elements (LE) 16,640 β€”
Maximum User I/O 496 502
Dedicated Inputs 6 β€”
Number of Terminals 655 β€”
Package SPGA-655 (47 mm x 47 mm) 655-ball FineLine BGA (SPGA655, 47x47 mm)
Nominal Supply Voltage 2.5 V β€”
Supply Voltage Range 2.375 V to 2.625 V 2.375 V to 2.625 V
Propagation Delay 3.1 ns (typical) β€”
Technology CMOS SRAM β€”
Operating Temperature -40C to +85C (industrial) β€”
Mounting Type Through-Hole / Socket β€”
Moisture Sensitivity Level 1 (per Altera family) β€”
Configuration Method JTAG, Passive Serial, Passive Parallel β€”
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+ β€”
Embedded Memory Embedded System Blocks (ESBs) β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Lifecycle Status Obsolete (legacy Altera APEX 20K family) β€”
Family β€” APEX-20K (loadable PLD / FPGA)
Logic Elements (LEs) β€” 16,640
System Gates β€” 400,000
Total I/O Lines β€” 496 (bidirectional) + 4 (dedicated inputs)
Embedded Memory (bits) β€” 212,992
Nominal Core Supply Voltage β€” 2.5 V
I/O Supply Voltages β€” 2.5 V / 3.3 V
Process Technology β€” CMOS
Propagation Delay (typical, -2 grade) β€” 3.1 ns
Package Code β€” SPGA655, 47x47
Surface Mount β€” Yes (BGA)
Moisture Sensitivity Level (MSL) β€” 1
Operating Temperature (industrial -X grade) β€” -40C to +85C (industrial)
Qualification β€” Not Qualified (per distributor listing)
JTAG Support β€” IEEE 1149.1 boundary-scan / programming

Datasheets & Resources

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