EP20K600CB652C-8 vs EP20K600CB652C9N Comparison

Detailed side-by-side comparison of EP20K600CB652C-8 by Altera and EP20K600CB652C9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB652C-8 EP20K600CB652C9N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $86.00 $128.00
Series APEX 20KC β€”
Family APEX 20KC (MultiCore) APEX 20KC
Typical Gates 600,000 600,000
Logic Elements 24,320 24,320
Embedded RAM 311,296 bits β€”
User I/Os 488 β€”
Propagation Delay 1.48 ns (per published source) β€”
Package 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch)
Mounting Type Surface Mount (thermally enhanced) Surface Mount (BGA)
Operating Temperature 0 C to 85 C (commercial) 0 C to 85 C (commercial)
Speed Grade -8 (slowest, most timing margin) C9 (~1.48 ns propagation delay)
VCCIO Options 1.8 V / 2.5 V / 3.3 V β€”
Process 0.15 Β΅m all-layer copper metal β€”
PCI Compliance PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit β€”
Memory Interface Support DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS β€”
Configuration Enhanced (EPC) bitstream β€”
Device Type β€” Loadable PLD (FPGA)
Maximum User I/O β€” 488
Process Technology β€” 0.15 micron all-layer copper CMOS
Core Supply Voltage β€” 1.8 V
Architecture β€” MultiCore LUT + embedded system memory (ESB)
On-chip Memory β€” Embedded system memory blocks (dual-port RAM, FIFO)
Configuration Interface β€” JTAG (IEEE 1149.1) and serial/PROM configuration
Pin/Pin Compatibility β€” Pin-compatible with APEX 20KE devices of same package
Toolchain β€” Altera/Intel Quartus II (legacy APEX support)
RoHS Status β€” [DATA_NEEDED: rohs status]
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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