EP20K600CB652C9N vs EP20K600CB652C-8 Comparison

Detailed side-by-side comparison of EP20K600CB652C9N by Intel and EP20K600CB652C-8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB652C9N EP20K600CB652C-8
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $128.00 $86.00
Family APEX 20KC APEX 20KC (MultiCore)
Device Type Loadable PLD (FPGA) β€”
Typical Gates 600,000 600,000
Logic Elements 24,320 24,320
Maximum User I/O 488 β€”
Package BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch)
Process Technology 0.15 micron all-layer copper CMOS β€”
Core Supply Voltage 1.8 V β€”
Speed Grade C9 (~1.48 ns propagation delay) -8 (slowest, most timing margin)
Architecture MultiCore LUT + embedded system memory (ESB) β€”
On-chip Memory Embedded system memory blocks (dual-port RAM, FIFO) β€”
Configuration Interface JTAG (IEEE 1149.1) and serial/PROM configuration β€”
Operating Temperature 0 C to 85 C (commercial) 0 C to 85 C (commercial)
Mounting Type Surface Mount (BGA) Surface Mount (thermally enhanced)
Pin/Pin Compatibility Pin-compatible with APEX 20KE devices of same package β€”
Toolchain Altera/Intel Quartus II (legacy APEX support) β€”
RoHS Status [DATA_NEEDED: rohs status] β€”
MSL Level [DATA_NEEDED: MSL level] β€”
Series β€” APEX 20KC
Embedded RAM β€” 311,296 bits
User I/Os β€” 488
Propagation Delay β€” 1.48 ns (per published source)
VCCIO Options β€” 1.8 V / 2.5 V / 3.3 V
Process β€” 0.15 Β΅m all-layer copper metal
PCI Compliance β€” PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit
Memory Interface Support β€” DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS
Configuration β€” Enhanced (EPC) bitstream

Datasheets & Resources

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