EP20K600CB652C9N vs EP20K600EBI652-2X Comparison
Detailed side-by-side comparison of EP20K600CB652C9N by Intel and EP20K600EBI652-2X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K600EBI652-2X - 600K Gate APEX 20KE FPGA 488 I/O BGA-652 | Intel
EP20K600EBI652-2X ObsoleteSpecification Comparison
| Parameter | EP20K600CB652C9N | EP20K600EBI652-2X |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $128.00 | $198.59 |
| Family | APEX 20KC | APEX 20KE |
| Device Type | Loadable PLD (FPGA) | β |
| Typical Gates | 600,000 | β |
| Logic Elements | 24,320 | 24,320 cells |
| Maximum User I/O | 488 | β |
| Package | BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch) | 652-ball BGA (45 x 45 mm, 1.27 mm pitch, thermally enhanced) |
| Process Technology | 0.15 micron all-layer copper CMOS | 0.18 Β΅m all-layer copper CMOS |
| Core Supply Voltage | 1.8 V | β |
| Speed Grade | C9 (~1.48 ns propagation delay) | -2X (mid-tier) |
| Architecture | MultiCore LUT + embedded system memory (ESB) | β |
| On-chip Memory | Embedded system memory blocks (dual-port RAM, FIFO) | β |
| Configuration Interface | JTAG (IEEE 1149.1) and serial/PROM configuration | β |
| Operating Temperature | 0 C to 85 C (commercial) | 0 C to 85 C (commercial) |
| Mounting Type | Surface Mount (BGA) | β |
| Pin/Pin Compatibility | Pin-compatible with APEX 20KE devices of same package | β |
| Toolchain | Altera/Intel Quartus II (legacy APEX support) | β |
| RoHS Status | [DATA_NEEDED: rohs status] | Lead-free / RoHS compliant |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Maximum Gates | β | 600,000 gates |
| User I/Os | β | 488 |
| Embedded RAM | β | 311 Kbits |
| Dedicated Inputs | β | 4 |
| Maximum Operating Frequency | β | 200 MHz |
| Propagation Delay | β | 1.48 ns |
| Core Voltage | β | 1.8 V |
| PLLs | β | 4 |
| MultiVolt I/O Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Configuration Method | β | Serial/parallel EPROM, JTAG, controller |