EP20K600CB652I7 vs EP20K600CB652C7ES Comparison
Detailed side-by-side comparison of EP20K600CB652I7 by Intel and EP20K600CB652C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K600CB652I7
EP20K600CB652I7 - 600K Gate APEX 20KC FPGA BGA-652 | Intel
EP20K600CB652I7 ObsoleteAltera
EP20K600CB652C7ES
EP20K600CB652C7ES - 600K Gates APEX 20KC FPGA | Altera | BGA-652
EP20K600CB652C7ES ObsoleteSpecification Comparison
| Parameter | EP20K600CB652I7 | EP20K600CB652C7ES |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $149.00 | $195.00 |
| Family | APEX 20KC | APEX 20KC |
| Manufacturer | Intel (formerly Altera) | β |
| Technology | 0.15 Β΅m CMOS, SRAM-based | β |
| System Gates | 600,000 | 600,000 |
| Logic Elements | 24,320 | 24,320 |
| Maximum Internal Frequency | 375.94 MHz | β |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V range) | β |
| User I/O Count | 488 (4 dedicated inputs + 480 I/O) | β |
| Number of Outputs | 480 | β |
| Package | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | -40 Β°C to +85 Β°C (industrial, 'I' suffix) | 0 Β°C to +85 Β°C (commercial) |
| Speed Grade | -7 | β |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | β |
| Embedded Memory | ESBs configurable as dual-port RAM / ROM / CAM | β |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status] |
| Maximum System Gates | β | 1,053,840 |
| Embedded Memory Bits | β | 311,296 |
| Embedded System Blocks (ESB) | β | 26 |
| Maximum User I/O | β | 488 |
| User I/O (this package) | β | 488 (652-BGA) |
| Supply Voltage - Core | β | 1.71 V to 1.89 V (1.8 V nominal) |
| Maximum Internal Clock Frequency | β | 1666.6 MHz |
| Process Technology | β | 0.15 Β΅m CMOS |
| Package Type | β | 652-ball FineLine BGA |
| JEDEC Package Code | β | S-PBGA-B652 |
| Configuration Modes | β | Passive Serial, Passive Parallel, JTAG |
| JTAG Boundary Scan | β | IEEE 1149.1 compliant |
| PLLs | β | 4 |