EP20K600CB672C7 vs EP20K600CB672C8N Comparison

Detailed side-by-side comparison of EP20K600CB672C7 by Altera and EP20K600CB672C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CB672C7 EP20K600CB672C8N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $182.50 $69.00
Family APEX 20KC APEX-20KC
Device Type FPGA / Programmable Logic Device (PLD) β€”
Typical Gates 600,000 β€”
Maximum System Gates 1,053,840 β€”
Logic Elements 30,960 (typical) β€”
Embedded Memory 311 kbits (EAB-based) β€”
User I/Os 488 β€”
Package 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) 672-BBGA (FineLine BGA)
Speed Grade C7 (commercial, 0 Β°C to 85 Β°C) C8
Propagation Delay 1.48 ns β€”
Process Technology 0.15 Β΅m all-layer copper-metal CMOS 0.18 Β΅m CMOS
Core Voltage 2.5 V β€”
I/O Voltage Support 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) β€”
Number of PLLs 4 β€”
Dual-Port RAM Yes (4.5 ns access) β€”
Supported I/O Standards LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) Commercial (0C to +85C)
Configuration Method EPC configuration devices / JTAG / passive serial β€”
RoHS Status Compliant [DATA_NEEDED: RoHS status]
Logic Elements (LEs) β€” 24,320
Embedded Memory Bits β€” 311,296
Maximum User I/O β€” 508
Configuration Memory β€” SRAM, in-system programmable
Configuration Schemes β€” Passive Serial / Active Serial / JTAG (IEEE 1149.1)
Core Voltage (VCCINT) β€” 2.5 V
I/O Voltage (VCCIO) β€” 1.8 V / 2.5 V / 3.3 V (MultiVolt)
PCI Support β€” PCI-SIG compliant 3.3 V, 33/66 MHz, 32/64-bit
External Memory Interface β€” DDR SDRAM, ZBT SRAM
Dedicated Clock Inputs β€” 16
PLLs β€” On-chip with clock-doubling and phase-shift
LVDS Channels β€” Up to 32
Mounting Type β€” Surface Mount (BGA)

Datasheets & Resources

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