EP20K600CB672C7 vs EP20K600CEF672C7 Comparison
Detailed side-by-side comparison of EP20K600CB672C7 by Altera and EP20K600CEF672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CB672C7 | EP20K600CEF672C7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $182.50 | $98.40 |
| Family | APEX 20KC | APEX 20KC (Enhanced Configuration) |
| Device Type | FPGA / Programmable Logic Device (PLD) | FPGA / Loadable PLD |
| Typical Gates | 600,000 | β |
| Maximum System Gates | 1,053,840 | β |
| Logic Elements | 30,960 (typical) | β |
| Embedded Memory | 311 kbits (EAB-based) | EAB blocks (dual-port RAM with byte enables) |
| User I/Os | 488 | 488 |
| Package | 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) | 672-ball FineLine BGA (FC-FBGA) |
| Speed Grade | C7 (commercial, 0 Β°C to 85 Β°C) | β |
| Propagation Delay | 1.48 ns | 1.48 ns (typ) |
| Process Technology | 0.15 Β΅m all-layer copper-metal CMOS | 0.15 Β΅m CMOS, all-layer copper |
| Core Voltage | 2.5 V | β |
| I/O Voltage Support | 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) | β |
| Number of PLLs | 4 | β |
| Dual-Port RAM | Yes (4.5 ns access) | β |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT | β |
| Operating Temperature | 0 Β°C to 85 Β°C (commercial) | 0 Β°C to +85 Β°C (commercial) |
| Configuration Method | EPC configuration devices / JTAG / passive serial | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Manufacturer | β | Intel (formerly Altera) |
| Series | β | APEX 20KC |
| Logic Elements / Cells | β | 24,320 |
| Gate Count (typical) | β | 600,000 gates |
| Maximum Operating Frequency | β | 375.94 MHz |
| Core Supply Voltage | β | 1.8 V |
| Package Code | β | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Configuration | β | SRAM-based, serial or parallel (EPC) |
| LVDS Support | β | True-LVDS channels integrated |
| MultiVolt I/O | β | 1.8 V, 2.5 V, 3.3 V interfaces |
| External Memory Interface | β | DDR SDRAM, QDR SRAM |
| JTAG Support | β | IEEE 1149.1 boundary-scan |