EP20K600CEF672C7 vs EP20K600CB672C7 Comparison
Detailed side-by-side comparison of EP20K600CEF672C7 by Intel and EP20K600CB672C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CEF672C7 | EP20K600CB672C7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $98.40 | $182.50 |
| Manufacturer | Intel (formerly Altera) | β |
| Series | APEX 20KC | β |
| Family | APEX 20KC (Enhanced Configuration) | APEX 20KC |
| Device Type | FPGA / Loadable PLD | FPGA / Programmable Logic Device (PLD) |
| Logic Elements / Cells | 24,320 | β |
| Gate Count (typical) | 600,000 gates | β |
| Maximum Operating Frequency | 375.94 MHz | β |
| Propagation Delay | 1.48 ns (typ) | 1.48 ns |
| User I/Os | 488 | 488 |
| Core Supply Voltage | 1.8 V | β |
| Process Technology | 0.15 Β΅m CMOS, all-layer copper | 0.15 Β΅m all-layer copper-metal CMOS |
| Package | 672-ball FineLine BGA (FC-FBGA) | 672-ball FineLine BGA (45 x 45 mm, 1.27 mm pitch) |
| Package Code | BGA-652, 45 x 45 mm, 1.27 mm pitch | β |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 Β°C to 85 Β°C (commercial) |
| Configuration | SRAM-based, serial or parallel (EPC) | β |
| Embedded Memory | EAB blocks (dual-port RAM with byte enables) | 311 kbits (EAB-based) |
| LVDS Support | True-LVDS channels integrated | β |
| MultiVolt I/O | 1.8 V, 2.5 V, 3.3 V interfaces | β |
| External Memory Interface | DDR SDRAM, QDR SRAM | β |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Typical Gates | β | 600,000 |
| Maximum System Gates | β | 1,053,840 |
| Logic Elements | β | 30,960 (typical) |
| Speed Grade | β | C7 (commercial, 0 Β°C to 85 Β°C) |
| Core Voltage | β | 2.5 V |
| I/O Voltage Support | β | 1.8 V, 2.5 V, 3.3 V (MultiVolt I/O) |
| Number of PLLs | β | 4 |
| Dual-Port RAM | β | Yes (4.5 ns access) |
| Supported I/O Standards | β | LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, AGP, HSTL, CTT |
| Configuration Method | β | EPC configuration devices / JTAG / passive serial |