EP20K600CF1020C7 vs EP20K600CEF672C7 Comparison

Detailed side-by-side comparison of EP20K600CF1020C7 by Altera and EP20K600CEF672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K600CF1020C7 EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 ⚠ Last Time Buy

Specification Comparison

Parameter EP20K600CF1020C7 EP20K600CEF672C7
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $212.40 $98.40
Family APEX 20KC APEX 20KC (Enhanced Configuration)
Manufacturer Altera (now Intel) Intel (formerly Altera)
Typical Gates 311,000 β€”
Maximum System Gates 600,000 β€”
Logic Elements / Cells 24,320 24,320
Maximum Operating Frequency 375.94 MHz 375.94 MHz
Process Technology 0.15 micrometer CMOS 0.15 Β΅m CMOS, all-layer copper
Core Voltage (VCCINT) 1.71 V to 1.89 V (nominal 1.8 V) β€”
I/O Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) β€”
User I/O Count 588 β€”
Total Inputs 580 + 4 dedicated β€”
Propagation Delay (Tpd) 1.6 ns β€”
Package 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) 672-ball FineLine BGA (FC-FBGA)
Mounting Type Surface Mount (BGA) β€”
Operating Temperature Grade Commercial (C) β€”
Speed Grade 7 β€”
Configuration Method SRAM-based, serial/parallel passive or enhanced configuration device β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] β€”
Series β€” APEX 20KC
Device Type β€” FPGA / Loadable PLD
Gate Count (typical) β€” 600,000 gates
Propagation Delay β€” 1.48 ns (typ)
User I/Os β€” 488
Core Supply Voltage β€” 1.8 V
Package Code β€” BGA-652, 45 x 45 mm, 1.27 mm pitch
Operating Temperature β€” 0 Β°C to +85 Β°C (commercial)
Configuration β€” SRAM-based, serial or parallel (EPC)
Embedded Memory β€” EAB blocks (dual-port RAM with byte enables)
LVDS Support β€” True-LVDS channels integrated
MultiVolt I/O β€” 1.8 V, 2.5 V, 3.3 V interfaces
External Memory Interface β€” DDR SDRAM, QDR SRAM
JTAG Support β€” IEEE 1149.1 boundary-scan

Datasheets & Resources

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