EP20K600CF33C7 vs EP20K600CF1020C7 Comparison

Detailed side-by-side comparison of EP20K600CF33C7 by Altera and EP20K600CF1020C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K600CF1020C7 EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 - APEX 20KC 600K Gates 1.8V FPGA | Altera

EP20K600CF1020C7 ⚠ Last Time Buy

Specification Comparison

Parameter EP20K600CF33C7 EP20K600CF1020C7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $105.40 $212.40
Series APEX-20K β€”
Family APEX-20K Field Programmable Gate Array APEX 20KC
Typical Gate Count 600,000 gates β€”
Logic Elements 24,320 β€”
Embedded RAM Bits 311,296 bits β€”
Embedded Array Blocks (EABs) [DATA_NEEDED: EAB count] β€”
Maximum User I/O Pins [DATA_NEEDED: max user I/O] β€”
Core Supply Voltage (VCCINT) 1.71 V to 1.89 V β€”
I/O Supply Voltage (VCCIO) [DATA_NEEDED: VCCIO range] β€”
Operating Temperature Range -40C to +85C (Industrial) β€”
Package 1020-BBGA / FCBGA (33x33 mm) 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Package Code BGA, 1020 balls β€”
Speed Grade C7 (7 ns) 7
Terminal Form Ball β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Mounting Type Surface Mount Surface Mount (BGA)
MSL Level [DATA_NEEDED: MSL level] β€”
Configuration Memory SRAM (volatile, requires external config device) β€”
Manufacturer β€” Altera (now Intel)
Typical Gates β€” 311,000
Maximum System Gates β€” 600,000
Logic Elements / Cells β€” 24,320
Maximum Operating Frequency β€” 375.94 MHz
Process Technology β€” 0.15 micrometer CMOS
Core Voltage (VCCINT) β€” 1.71 V to 1.89 V (nominal 1.8 V)
I/O Voltage (VCCIO) β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent)
User I/O Count β€” 588
Total Inputs β€” 580 + 4 dedicated
Propagation Delay (Tpd) β€” 1.6 ns
Operating Temperature Grade β€” Commercial (C)
Configuration Method β€” SRAM-based, serial/parallel passive or enhanced configuration device
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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