EP20K600CF672C-7ES vs EP20K400CF672C7ES Comparison

Detailed side-by-side comparison of EP20K600CF672C-7ES by Altera and EP20K400CF672C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672C-7ES EP20K400CF672C7ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $2,050.00 $152.00
Family APEX 20KC APEX 20KC
Device Type Field Programmable Gate Array (FPGA) Loadable PLD / FPGA
Maximum System Gates 1,560,000 (typical 600K application gates) β€”
Typical Logic Elements 24,320 (per APEX 20KC 600K family) β€”
Maximum User I/O 488 488
Total I/O Lines 504 (per Microchip USA listing) β€”
Total Inputs 508 β€”
Embedded System Blocks (ESBs) 248 β€”
Embedded RAM 248 Kbits (dual-port) β€”
PLLs 4 β€”
Propagation Delay 1.48 ns to 1.6 ns 1.4 ns
Maximum Clock Frequency 1666.6 MHz β€”
Speed Grade -7 C7 (commercial, -7)
Process Technology 0.15 micron all-layer copper CMOS 0.18 um CMOS
Package 672-ball FCBGA (FineLine BGA), 45 x 45 mm, 1.27 mm pitch β€”
Operating Temperature 0 C to 85 C (Commercial) 0C to +85C (commercial)
Core Voltage 1.8 V (typical APEX 20KC, exact value per datasheet) 1.8 V
Configuration Mode EPC serial / JTAG IEEE 1149.1 β€”
Compliance RoHS status unknown (verify with manufacturer datasheet) β€”
Series β€” EP20K400
Logic Elements (Cells) β€” 16,640
System Gates β€” 400,000
Embedded Memory (Bits) β€” 212,992
Total RAM Bits β€” 212,992
I/O Lines β€” 484
Input Lines β€” 488
Number of PLLs β€” 4
Maximum Internal Clock Frequency β€” 375.94 MHz
MultiVolt I/O β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V
Package Type β€” 672-ball FineLine BGA
Package Code β€” FC-FBGA-B672
Ball Pitch β€” 1.000 mm
Mounting Type β€” Surface Mount
RoHS Status β€” [DATA_NEEDED: RoHS compliance]

Datasheets & Resources

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