EP20K600CF672C6 vs EP20K600CF672C-7 Comparison
Detailed side-by-side comparison of EP20K600CF672C6 by Altera and EP20K600CF672C-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672C6 | EP20K600CF672C-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $480.00 | $1,620.00 |
| Family | APEX 20KC | β |
| Typical Gate Count | 600,000 gates | β |
| Logic Elements (LEs) | 24,320 | β |
| Embedded System Blocks (ESBs) | 160 (each 2,048 bits) | β |
| Maximum Embedded RAM | 311,296 bits (311 kbit) | β |
| Maximum User I/O Pins | 508 | β |
| Package | 672-ball FineLine BGA (CF672) | β |
| Package Body Size | 27 mm Γ 27 mm | β |
| Speed Grade | -6 (C6) | -7 |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 Β°C to 85 Β°C (Commercial) |
| Core Voltage | 1.8 V | β |
| I/O Standards Supported | LVCMOS, LVTTL, HSTL, SSTL, GTL+ | β |
| Embedded PLLs | 4 | β |
| Process Technology | 0.18 Β΅m CMOS, 6 metal layers | 0.18 Β΅m all-layer copper-metal (APEX 20KC) |
| Configuration Method | SRAM-based, JTAG, EPC16/EPC2 | β |
| RoHS Status | Non-RoHS (legacy process) | β |
| Device Family | β | APEX 20KC |
| Typical Gates | β | 600,000 |
| Logic Elements | β | 24,576 |
| Maximum User I/O | β | 508 |
| Embedded Memory (ESB) | β | 311 kbits |
| Number of Terminals | β | 672 |
| Package Type | β | 672-BBGA, FCBGA |
| Package Dimensions | β | 45 x 45 mm |
| Ball Pitch | β | 1.27 mm |
| Propagation Delay | β | 1.48 ns |
| Configuration Interface | β | EPC (Enhanced Configuration) device family |
| Mounting Type | β | Surface Mount |
| Lead-Free / RoHS | β | [DATA_NEEDED: lead-free/RoHS status not stated in verified web data] |