EP20K600CF672C6 vs EP20K600CF672C7ES Comparison

Detailed side-by-side comparison of EP20K600CF672C6 by Altera and EP20K600CF672C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K600CF672C7ES EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera

EP20K600CF672C7ES ⚠ Last Time Buy

Specification Comparison

Parameter EP20K600CF672C6 EP20K600CF672C7ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $480.00 $360.00
Family APEX 20KC APEX 20K
Typical Gate Count 600,000 gates β€”
Logic Elements (LEs) 24,320 β€”
Embedded System Blocks (ESBs) 160 (each 2,048 bits) β€”
Maximum Embedded RAM 311,296 bits (311 kbit) β€”
Maximum User I/O Pins 508 β€”
Package 672-ball FineLine BGA (CF672) β€”
Package Body Size 27 mm Γ— 27 mm β€”
Speed Grade -6 (C6) β€”
Operating Temperature 0 Β°C to +85 Β°C (commercial) [DATA_NEEDED: operating temperature grade]
Core Voltage 1.8 V β€”
I/O Standards Supported LVCMOS, LVTTL, HSTL, SSTL, GTL+ β€”
Embedded PLLs 4 β€”
Process Technology 0.18 Β΅m CMOS, 6 metal layers 0.15 Β΅m CMOS
Configuration Method SRAM-based, JTAG, EPC16/EPC2 β€”
RoHS Status Non-RoHS (legacy process) [DATA_NEEDED: RoHS compliance]
Series β€” APEX 20KC
Logic Elements / Cells β€” 24320
System Gates β€” 600000
Maximum User I/O β€” 504
Maximum Input Lines β€” 508
Number of Macrocells β€” 504
Maximum Operating Frequency β€” 375.94 MHz (per FPGAkey listing)
Propagation Delay β€” 1.6 ns
Internal Reference Clock β€” 1666.6 MHz
Core Supply Voltage (VCCINT) β€” 1.8 V
Package Type β€” FC-FBGA
Pin / Ball Count β€” 672
Grade Suffix β€” ES (engineering sample / extended screening)
Mounting Type β€” Surface Mount (BGA)
MSL Level β€” [DATA_NEEDED: MSL rating]
Configuration Memory β€” SRAM-based (volatile)

Datasheets & Resources

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