EP20K600CF672C7ES vs EP20K600CF672C6 Comparison
Detailed side-by-side comparison of EP20K600CF672C7ES by Altera and EP20K600CF672C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K600CF672C7ES - APEX 20KC FPGA 600K Gates 672-FBGA | Altera
EP20K600CF672C7ES β Last Time BuySpecification Comparison
| Parameter | EP20K600CF672C7ES | EP20K600CF672C6 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $360.00 | $480.00 |
| Series | APEX 20KC | β |
| Family | APEX 20K | APEX 20KC |
| Logic Elements / Cells | 24320 | β |
| System Gates | 600000 | β |
| Maximum User I/O | 504 | β |
| Maximum Input Lines | 508 | β |
| Number of Macrocells | 504 | β |
| Maximum Operating Frequency | 375.94 MHz (per FPGAkey listing) | β |
| Propagation Delay | 1.6 ns | β |
| Internal Reference Clock | 1666.6 MHz | β |
| Process Technology | 0.15 Β΅m CMOS | 0.18 Β΅m CMOS, 6 metal layers |
| Core Supply Voltage (VCCINT) | 1.8 V | β |
| Package Type | FC-FBGA | β |
| Pin / Ball Count | 672 | β |
| Grade Suffix | ES (engineering sample / extended screening) | β |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | 0 Β°C to +85 Β°C (commercial) |
| Mounting Type | Surface Mount (BGA) | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | Non-RoHS (legacy process) |
| Configuration Memory | SRAM-based (volatile) | β |
| Typical Gate Count | β | 600,000 gates |
| Logic Elements (LEs) | β | 24,320 |
| Embedded System Blocks (ESBs) | β | 160 (each 2,048 bits) |
| Maximum Embedded RAM | β | 311,296 bits (311 kbit) |
| Maximum User I/O Pins | β | 508 |
| Package | β | 672-ball FineLine BGA (CF672) |
| Package Body Size | β | 27 mm Γ 27 mm |
| Speed Grade | β | -6 (C6) |
| Core Voltage | β | 1.8 V |
| I/O Standards Supported | β | LVCMOS, LVTTL, HSTL, SSTL, GTL+ |
| Embedded PLLs | β | 4 |
| Configuration Method | β | SRAM-based, JTAG, EPC16/EPC2 |