EP20K600CF672C7N vs EP20K600CF672I8 Comparison
Detailed side-by-side comparison of EP20K600CF672C7N by Altera and EP20K600CF672I8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672C7N | EP20K600CF672I8 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $108.00 | $195.00 |
| Device Family | APEX 20KC | β |
| Maximum System Gates | 1,052,000 | β |
| Typical Gates | 600,000 | β |
| Logic Elements / Cells | 24,320 | 24,320 |
| Maximum User I/O Pins | 488 | β |
| Total Package Pins | 652 | β |
| Package | FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch | β |
| Core Voltage | 1.8 V | β |
| Maximum Operating Frequency | 375.94 MHz | β |
| Propagation Delay | 1.48 ns | β |
| Process Technology | 0.15 Β΅m all-layer copper-metal CMOS | 0.15 Β΅m all-layer copper |
| Architecture | MultiCore (LUT + Embedded System Memory) | β |
| Operating Temperature | 0 Β°C to +85 Β°C (Commercial) | 0 Β°C to +85 Β°C (Industrial) |
| Speed Grade | C7 | β |
| Seated Height | 3.50 mm | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | unknown | Compliant per legacy product records |
| Family | β | APEX 20KC |
| Device Type | β | SPLD / FPGA |
| Macros (Logic Cells) | β | 2432 |
| Typical Gate Count | β | 600,000 gates |
| Embedded Memory | β | 311,296 bits |
| User I/Os | β | 488 to 508 |
| Number of Pins | β | 652 (functional) / 672 (BGA balls) |
| Propagation Delay (typical) | β | 1.48 ns |
| Internal Frequency (max) | β | [DATA_NEEDED: max internal frequency in MHz] |
| Core Supply Voltage | β | 1.8 V |
| Package Type | β | 672-ball BGA, 45 x 45 mm, 1.27 mm pitch |
| Configuration Interface | β | JTAG / Passive Serial |
| Design Tool | β | Quartus II (legacy MAX+PLUS II) |