EP20K600CF672C8N vs EP20K600CF672I8 Comparison
Detailed side-by-side comparison of EP20K600CF672C8N by Intel and EP20K600CF672I8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672C8N | EP20K600CF672I8 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $108.00 | $195.00 |
| Device Type | SPLD | SPLD / FPGA |
| Product Type | FPGA / programmable logic device | β |
| Family | APEX 20KC | APEX 20KC |
| Nominal Gate Capacity | 600K gates | β |
| Logic Elements or Cells | 24,320 | β |
| Macros | 2,432 | β |
| User I/O Count | 508 | β |
| Package Terminals | 652 pins | β |
| Package | BGA-652, 45 x 45 mm, 1.27 mm pitch | β |
| Package Description | 672-pin FC-FBGA | β |
| Supply Voltage | 1.8 V | β |
| Listed Frequency | 301.21 MHz | β |
| Propagation Delay | 1.48 ns | β |
| Fabrication Process | 0.15 Β΅m | β |
| Operating Temperature | 0Β°C to 85Β°C | 0 Β°C to +85 Β°C (Industrial) |
| Interconnect Metal | All-layer copper metal | β |
| I/O Configuration | 508 user I/O | β |
| Mounting Type | Surface mount | Surface Mount |
| RoHS Status | unknown | Compliant per legacy product records |
| REACH Status | unknown | β |
| AEC-Q100 Qualification | unknown | β |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | β |
| Core Current | [DATA_NEEDED: core supply current] | β |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | β |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | β |
| Thermal Resistance | [DATA_NEEDED: junction-to-ambient thermal resistance] | β |
| Logic Elements / Cells | β | 24,320 |
| Macros (Logic Cells) | β | 2432 |
| Typical Gate Count | β | 600,000 gates |
| Embedded Memory | β | 311,296 bits |
| User I/Os | β | 488 to 508 |
| Number of Pins | β | 652 (functional) / 672 (BGA balls) |
| Propagation Delay (typical) | β | 1.48 ns |
| Internal Frequency (max) | β | [DATA_NEEDED: max internal frequency in MHz] |
| Core Supply Voltage | β | 1.8 V |
| Process Technology | β | 0.15 Β΅m all-layer copper |
| Package Type | β | 672-ball BGA, 45 x 45 mm, 1.27 mm pitch |
| Configuration Interface | β | JTAG / Passive Serial |
| Design Tool | β | Quartus II (legacy MAX+PLUS II) |