EP20K600CF672C9N vs EP20K600CF672I9N Comparison

Detailed side-by-side comparison of EP20K600CF672C9N by Intel and EP20K600CF672I9N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600CF672C9N EP20K600CF672I9N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $175.00 $120.00
Family APEX 20KC APEX 20KC
Device Type Loadable PLD / SRAM FPGA β€”
System Gates 600,000 β€”
Logic Elements 24,320 24,320 cells
Maximum Operating Frequency 250 MHz β€”
Propagation Delay 1.48 ns (per logic element) β€”
Core Supply Voltage 1.71 V to 1.89 V (1.8 V nominal) β€”
User I/Os 488 β€”
Total Terminals 672 β€”
Package Type FineLine BGA (FC-FBGA), 1.00 mm pitch, 45 x 45 mm β€”
Process Technology 0.15 Β΅m all-layer copper 0.15 Β΅m CMOS
Operating Temperature 0 C to 85 C (commercial) -40 Β°C to +85 Β°C (industrial)
Mounting Type Surface Mount β€”
Configuration Interface JTAG (IEEE 1149.1), passive serial, active serial β€”
Embedded Memory MultiCore EABs supporting up to 311,000 RAM bits 311,040 bits (approx. 38 KB)
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Typical Gates β€” 600,000
Maximum Frequency β€” 250 MHz
Core Voltage (VCCINT) β€” 1.8 V
I/O Voltage (VCCIO) β€” [DATA_NEEDED: VCCIO range]
Package β€” 672-ball FC-FBGA
PLL Count β€” [DATA_NEEDED: PLL count]
User I/O Pins β€” [DATA_NEEDED: max user I/O]
Configuration Mode β€” JTAG / Serial / Parallel
Programming Interface β€” IEEE 1149.1 JTAG

Datasheets & Resources

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