EP20K600CF672I8 vs EP20K600CF672C8N Comparison
Detailed side-by-side comparison of EP20K600CF672I8 by Altera and EP20K600CF672C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K600CF672I8 | EP20K600CF672C8N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $108.00 |
| Family | APEX 20KC | APEX 20KC |
| Device Type | SPLD / FPGA | SPLD |
| Logic Elements / Cells | 24,320 | β |
| Macros (Logic Cells) | 2432 | β |
| Typical Gate Count | 600,000 gates | β |
| Embedded Memory | 311,296 bits | β |
| User I/Os | 488 to 508 | β |
| Number of Pins | 652 (functional) / 672 (BGA balls) | β |
| Propagation Delay (typical) | 1.48 ns | β |
| Internal Frequency (max) | [DATA_NEEDED: max internal frequency in MHz] | β |
| Core Supply Voltage | 1.8 V | β |
| Process Technology | 0.15 Β΅m all-layer copper | β |
| Operating Temperature | 0 Β°C to +85 Β°C (Industrial) | 0Β°C to 85Β°C |
| Package Type | 672-ball BGA, 45 x 45 mm, 1.27 mm pitch | β |
| Mounting Type | Surface Mount | Surface mount |
| RoHS Status | Compliant per legacy product records | unknown |
| Configuration Interface | JTAG / Passive Serial | β |
| Design Tool | Quartus II (legacy MAX+PLUS II) | β |
| Product Type | β | FPGA / programmable logic device |
| Nominal Gate Capacity | β | 600K gates |
| Logic Elements or Cells | β | 24,320 |
| Macros | β | 2,432 |
| User I/O Count | β | 508 |
| Package Terminals | β | 652 pins |
| Package | β | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Package Description | β | 672-pin FC-FBGA |
| Supply Voltage | β | 1.8 V |
| Listed Frequency | β | 301.21 MHz |
| Propagation Delay | β | 1.48 ns |
| Fabrication Process | β | 0.15 Β΅m |
| Interconnect Metal | β | All-layer copper metal |
| I/O Configuration | β | 508 user I/O |
| REACH Status | β | unknown |
| AEC-Q100 Qualification | β | unknown |
| Configuration Method | β | [DATA_NEEDED: configuration memory and programming method] |
| Core Current | β | [DATA_NEEDED: core supply current] |
| I/O Bank Voltage | β | [DATA_NEEDED: supported I/O voltage range] |
| Junction Temperature | β | [DATA_NEEDED: maximum junction temperature] |
| Thermal Resistance | β | [DATA_NEEDED: junction-to-ambient thermal resistance] |