EP20K600EBC652-2X vs EP20K600EBC652-3 Comparison
Detailed side-by-side comparison of EP20K600EBC652-2X by Altera and EP20K600EBC652-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K600EBC652-2X
EP20K600EBC652-2X - APEX 20KE FPGA, 24,320 LEs, 652-BGA | Altera
EP20K600EBC652-2X ObsoleteIntel
EP20K600EBC652-3
EP20K600EBC652-3 - APEX 20KE FPGA 600K 488 I/O BGA-652 | Intel
EP20K600EBC652-3 ObsoleteSpecification Comparison
| Parameter | EP20K600EBC652-2X | EP20K600EBC652-3 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $275.00 | $340.00 |
| Device Family | APEX 20KE | β |
| Device Type | SPLD / FPGA (Field Programmable Gate Array) | FPGA (Field Programmable Gate Array) / SPLD Loadable |
| Logic Elements (LEs) | 24,320 | β |
| Macros | 24,320 | β |
| Embedded Memory Bits | 311,296 bits | β |
| User I/Os | 488 | 488 |
| Package | 652-ball BGA, 45 x 45 mm, 1.27 mm pitch | β |
| Total Pins / Balls | 652 | β |
| Propagation Delay | 1.48 ns | 1.48 ns |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | 0 C to 85 C |
| Process Technology | 0.15 Β΅m all-layer copper CMOS | 0.15-micron all-layer copper CMOS |
| Core Supply Voltage | 2.5 V | β |
| I/O Standard Support | LVTTL, LVCMOS, PCI, SSTL, GTL+ | β |
| Configuration Modes | Passive serial, passive parallel, JTAG (IEEE 1149.1) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Series | β | APEX-20KE |
| Family | β | APEX 20K |
| Logic Elements | β | 24320 |
| Embedded Memory | β | 311296 bits |
| Number of Terminals | β | 652 |
| Package Type | β | BGA-652 (45 x 45 mm, 1.27 mm pitch) |
| Speed Grade | β | -3 |
| Core Voltage | β | [DATA_NEEDED: core voltage] |
| I/O Voltage Support | β | Multi-volt 3.3 V / 2.5 V / 1.8 V |
| Configuration Method | β | JTAG / serial / passive parallel |
| PLLs | β | 4 |
| Lead-Free | β | [DATA_NEEDED: lead-free] |