EP20K600EFC144-2XN vs EP20K600EBC652-2X Comparison

Detailed side-by-side comparison of EP20K600EFC144-2XN by Altera and EP20K600EBC652-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K600EFC144-2XN EP20K600EBC652-2X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $115.00 $275.00
Family APEX 20KE β€”
Logic Elements 24,576 β€”
Typical Gates 600,000 β€”
Maximum System Gates 1,053,840 β€”
Embedded RAM Bits 311,040 bits (~38 KB) β€”
Number of ESBs (Embedded System Blocks) [DATA_NEEDED: ESB count] β€”
Number of Multiplier Blocks [DATA_NEEDED: multiplier count] β€”
Number of PLLs 4 β€”
Number of I/O Pins [DATA_NEEDED: usable I/O count] β€”
Core Voltage 1.8 V β€”
I/O Voltage Banks Multi-voltage (LVTTL/LVCMOS/PCI) β€”
Process Technology 0.18 um CMOS, 6-layer metal 0.15 Β΅m all-layer copper CMOS
Speed Grade -2 (mid-tier) β€”
Package 144-ball FineLine BGA 652-ball BGA, 45 x 45 mm, 1.27 mm pitch
Operating Temperature -40C to +85C (industrial, 'N' suffix) 0 Β°C to +85 Β°C (commercial)
RoHS Status [DATA_NEEDED: RoHS] [DATA_NEEDED: RoHS status]
Configuration Method SRAM, IEEE 1532 / passive serial / passive parallel β€”
Device Family β€” APEX 20KE
Device Type β€” SPLD / FPGA (Field Programmable Gate Array)
Logic Elements (LEs) β€” 24,320
Macros β€” 24,320
Embedded Memory Bits β€” 311,296 bits
User I/Os β€” 488
Total Pins / Balls β€” 652
Propagation Delay β€” 1.48 ns
Core Supply Voltage β€” 2.5 V
I/O Standard Support β€” LVTTL, LVCMOS, PCI, SSTL, GTL+
Configuration Modes β€” Passive serial, passive parallel, JTAG (IEEE 1149.1)
Mounting Type β€” Surface Mount

Datasheets & Resources

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