EP20K60EFC324-1 vs EP20K60EFC324-2N Comparison

Detailed side-by-side comparison of EP20K60EFC324-1 by Altera and EP20K60EFC324-2N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K60EFC324-1 EP20K60EFC324-2N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $76.50 $52.73
Series APEX-20KEยฎ APEX-20KE
Family APEX 20K (Enhanced) APEX 20K
Logic Elements / Cells 2560 โ€”
Total Gates 60,000 (typical) โ€”
Total RAM Bits 32768 32,768
Number of I/O 196 196
Number of Logic Blocks/Elements 2560 โ€”
Core Supply Voltage 1.71 V to 1.89 V (1.8 V nominal) โ€”
Process Technology 0.22 ยตm CMOS 0.22 ยตm CMOS
Maximum Operating Frequency 250 MHz โ€”
Speed Grade -1 โ€”
Package / Case 324-FBGA (FineLine BGA, 19x19 mm) 324-BGA (FineLine BGA, 19x19 mm)
Supplier Device Package 324-FBGA (19x19) 324-FBGA (19x19)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0 ยฐC to +85 ยฐC (commercial) โ€”
RoHS Status Non-compliant (legacy) unknown
Lead Free Status Contains lead (legacy) โ€”
Number of Logic Elements/Cells โ€” 2,560
Total System Gates โ€” 60,000
Number of Logic Array Blocks (LABs/CLBs) โ€” 2,560
Core Voltage Supply โ€” 1.71 V to 1.89 V (1.8 V typ.)
Internal Frequency (max) โ€” 200 MHz
Propagation Delay โ€” 1.72 ns
Operating Temperature Range (TJ) โ€” 0 ยฐC to 85 ยฐC (commercial)
Architecture โ€” MultiCore (LUT + ESB memory + product-term)
Configuration Method โ€” Passive Serial / JTAG (IEEE 1149.1)

Datasheets & Resources

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