EP20K60ETC144-2N vs EP20K60ETC144-3 Comparison
Detailed side-by-side comparison of EP20K60ETC144-2N by Intel and EP20K60ETC144-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K60ETC144-2N | EP20K60ETC144-3 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $65.00 | $26.80 |
| Family | APEX-20KE | β |
| Logic Elements | 2,560 | 2,560 |
| Typical Gates | 60,000 | β |
| Embedded Memory (ESB) | 32,768 bits (32 Kbits) | β |
| User I/Os | 92 | β |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V nominal) | 1.71 V to 1.89 V |
| Speed Grade | -2 | -3 |
| Internal Frequency (max) | 160 MHz | β |
| Propagation Delay | 1.72 ns | 1.72 ns |
| Process Technology | 0.22 Β΅m CMOS | 0.22 Β΅m CMOS |
| Package | 144-pin TQFP (20 Γ 20 mm, 0.5 mm pitch) | 144-LQFP (20x20 mm) |
| Operating Temperature | 0 Β°C to 85 Β°C (commercial) | 0 Β°C to 85 Β°C (TJ) |
| Mounting Type | Surface Mount | Surface Mount |
| Logic Family | CMOS | β |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Manufacturer | β | Intel (formerly Altera) |
| Series | β | APEX 20KE |
| Embedded Memory (RAM bits) | β | 32,768 |
| Maximum User I/O Pins (device) | β | 196 |
| User I/O Pins (this package) | β | 92 |
| Maximum Internal Frequency | β | 160 MHz to 182 MHz |
| Programmable I/O Standards | β | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS |
| Configuration Interface | β | JTAG (IEEE 1149.1) |
| Total Package Pins | β | 144 |