EP2A25F672C8 vs EP2A25F672I6 Comparison

Detailed side-by-side comparison of EP2A25F672C8 by Altera and EP2A25F672I6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP2A25F672C8

EP2A25F672C8 - APEX II FPGA 492 I/O 672-FBGA | Intel / Altera

EP2A25F672C8 Obsolete

Specification Comparison

Parameter EP2A25F672C8 EP2A25F672I6
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $951.18 $178.00
Family APEX II (EP2A25) APEX II
Logic Elements 25,000 (typical gates) β€”
Maximum System Gates 40,960 β€”
Macrocells / Embedded Logic 2,432 macros β€”
User I/O Count 492 β€”
Package 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) 672-ball FineLine BGA (FBGA-672)
Propagation Delay (tpd) 1.69 ns β€”
Speed Grade C8 6
Operating Temperature 0 C to 85 C (commercial) β€”
Process Technology 0.15 microm CMOS, 8-layer copper interconnect 0.18 Β΅m CMOS
I/O Standards Supported LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL β€”
LVDS Data Rate 1 Gbps β€”
PLL Count 4 β€”
Embedded Memory ESB blocks (dual-port RAM, FIFO, CAM, ROM) Embedded System Blocks (ESB), dual-port RAM / CAM
I/O Banks 16 β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status Non-compliant (legacy product) [DATA_NEEDED: RoHS compliance status]
Logic Elements (typical gates) β€” 25,000
Fabric Architecture β€” SRAM-based LUT
Core Voltage β€” 1.5 V
Configuration Method β€” External SRAM configuration device (EPC series)
Temperature Grade β€” Industrial (-40 Β°C to +100 Β°C ambient)
DSP Blocks β€” MultiCore dedicated multipliers
Boundary Scan β€” JTAG (IEEE 1149.1) compliant
Clock Management β€” Dedicated PLL / clock tree circuitry
I/O Bank Count β€” [DATA_NEEDED: number of user I/O banks]
Lead-Free β€” [DATA_NEEDED: lead-free status]
MSL Level β€” [DATA_NEEDED: moisture sensitivity level]

Datasheets & Resources

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