EP2A25F672C8N vs EP2A25F672I6 Comparison

Detailed side-by-side comparison of EP2A25F672C8N by Intel and EP2A25F672I6 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A25F672C8N EP2A25F672I6
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $205.00 $178.00
Family APEX II APEX II
Technology Node 0.15 um all-layer copper process β€”
System Gates 900,000 β€”
Logic Elements / Cells 24,320 β€”
Maximum Internal Frequency 333 MHz β€”
Propagation Delay 1.69 ns β€”
User I/Os 492 β€”
Package 672-ball FC-FBGA (FineLine BGA) 672-ball FineLine BGA (FBGA-672)
Package Body Size 27 x 27 mm β€”
Ball Pitch 1.0 mm β€”
Core Supply Voltage 1.5 V β€”
Speed Grade C8 6
Operating Temperature 0 C to 85 C (commercial) β€”
Multi-Gigabit Transceiver Rate Up to 1 Gbps per channel β€”
Mounting Type Surface Mount Surface Mount (BGA)
RoHS Status Compliant [DATA_NEEDED: RoHS compliance status]
Lead-Free Suffix N (lead-free, Pb-free finish) β€”
Logic Elements (typical gates) β€” 25,000
Fabric Architecture β€” SRAM-based LUT
Process Technology β€” 0.18 Β΅m CMOS
Core Voltage β€” 1.5 V
Configuration Method β€” External SRAM configuration device (EPC series)
Temperature Grade β€” Industrial (-40 Β°C to +100 Β°C ambient)
Embedded Memory β€” Embedded System Blocks (ESB), dual-port RAM / CAM
DSP Blocks β€” MultiCore dedicated multipliers
Boundary Scan β€” JTAG (IEEE 1149.1) compliant
Clock Management β€” Dedicated PLL / clock tree circuitry
I/O Bank Count β€” [DATA_NEEDED: number of user I/O banks]
Lead-Free β€” [DATA_NEEDED: lead-free status]
MSL Level β€” [DATA_NEEDED: moisture sensitivity level]

Datasheets & Resources

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