EP2A25F672ES vs EP2A25F672C7 Comparison
Detailed side-by-side comparison of EP2A25F672ES by Altera and EP2A25F672C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2A25F672ES
EP2A25F672ES - APEX II 25K Logic Elements FPGA | Altera | 672-BGA
EP2A25F672ES ObsoleteAltera
EP2A25F672C7
EP2A25F672C7 - APEX II FPGA, 25K LE, 492 I/O, 672-BGA | Altera
EP2A25F672C7 NrndSpecification Comparison
| Parameter | EP2A25F672ES | EP2A25F672C7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $198.00 | $118.00 |
| Family | APEX II | β |
| Logic Elements | 24,320 | 25,000 |
| Maximum Gates | 900,000 | β |
| Embedded System Blocks (ESBs) | 24 | β |
| Maximum Embedded RAM | 1.4 Mbit | β |
| Maximum User I/O Pins | 492 | β |
| Package | 672-ball FC-FBGA | 672-ball FCBGA (FineLine BGA) |
| Process Technology | 0.15 Β΅m CMOS | 0.15-um all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | β |
| Maximum System Clock Frequency | 500 MHz | β |
| Number of PLLs | 4 | β |
| I/O Banks | 16 | β |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | β |
| Configuration Mode | Serial / Parallel / JTAG | Passive Serial, Passive Parallel, JTAG |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | β |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Product Family | β | APEX II |
| Maximum System Gates | β | 1,650,000 |
| Maximum RAM Bits | β | 422,976 |
| User I/O Count | β | 492 |
| Supply Voltage (Core) | β | 1.5 V |
| LVDS Data Rate | β | 1 Gbps per channel (True-LVDS) |
| I/O Standards Supported | β | LVDS, LVPECL, PCML, HyperTransport |
| Operating Temperature | β | 0C to +85C (Commercial) |
| Speed Grade | β | -7 |
| Embedded System Blocks (ESB) | β | Yes - RAM, ROM, CAM, multiplier support |