EP2A25F672ES vs EP2A25F672C8 Comparison
Detailed side-by-side comparison of EP2A25F672ES by Altera and EP2A25F672C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A25F672ES | EP2A25F672C8 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $198.00 | $951.18 |
| Family | APEX II | APEX II (EP2A25) |
| Logic Elements | 24,320 | 25,000 (typical gates) |
| Maximum Gates | 900,000 | β |
| Embedded System Blocks (ESBs) | 24 | β |
| Maximum Embedded RAM | 1.4 Mbit | β |
| Maximum User I/O Pins | 492 | β |
| Package | 672-ball FC-FBGA | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) |
| Process Technology | 0.15 Β΅m CMOS | 0.15 microm CMOS, 8-layer copper interconnect |
| Core Voltage | 1.5 V | β |
| Maximum System Clock Frequency | 500 MHz | β |
| Number of PLLs | 4 | β |
| I/O Banks | 16 | 16 |
| Supported I/O Standards | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL | β |
| Configuration Mode | Serial / Parallel / JTAG | β |
| Operating Temperature Range | [DATA_NEEDED: operating temperature range] | β |
| RoHS Status | Compliant | Non-compliant (legacy product) |
| Maximum System Gates | β | 40,960 |
| Macrocells / Embedded Logic | β | 2,432 macros |
| User I/O Count | β | 492 |
| Propagation Delay (tpd) | β | 1.69 ns |
| Speed Grade | β | C8 |
| Operating Temperature | β | 0 C to 85 C (commercial) |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL |
| LVDS Data Rate | β | 1 Gbps |
| PLL Count | β | 4 |
| Embedded Memory | β | ESB blocks (dual-port RAM, FIFO, CAM, ROM) |
| Mounting Type | β | Surface Mount |