EP2A25F672I9 vs EP2A25F672I8N Comparison
Detailed side-by-side comparison of EP2A25F672I9 by Intel and EP2A25F672I8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A25F672I8N - APEX II FPGA 900K Gates 672-BGA | Intel / Altera
EP2A25F672I8N β Last Time BuySpecification Comparison
| Parameter | EP2A25F672I9 | EP2A25F672I8N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $135.00 | $198.50 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | β |
| Logic Elements (LEs) | 24,320 | β |
| System Gates (typical) | 900,000 | β |
| Maximum Operating Frequency | 236 MHz | β |
| Process Technology | 0.15 Β΅m CMOS | 0.15 Β΅m all-layer copper-metal |
| Core Voltage (VCCINT) | 1.5 V | 1.5 V |
| Package | 672-pin FC-FBGA | 672-ball FC-FBGA (FineLine BGA) |
| Pin Count | 672 | β |
| Temperature Grade | Industrial (-40 Β°C to +100 Β°C) | β |
| Speed Grade | 9 (fastest APEX II grade) | β |
| Embedded System Blocks (ESBs) | Yes (dual-port RAM/ROM) | β |
| Maximum User I/O | [DATA_NEEDED: max user I/O pin count] | β |
| Maximum Memory Bits | 422,400 bits | β |
| PLLs | 4 | β |
| Mounting Type | Surface Mount (flip-chip BGA) | β |
| Peak Reflow Temperature | 220 Β°C (per distributor listing) | β |
| Moisture Sensitivity Level (MSL) | 3 | β |
| RoHS Status | Unknown (legacy 2000s part; verify lot certificate) | unknown |
| Device | β | EP2A25 |
| Logic Elements | β | 24,320 |
| Gates | β | 900,000 |
| Embedded Memory (bits) | β | 622,592 |
| User I/Os | β | 492 |
| Package Size | β | 27 x 27 mm |
| Ball Pitch | β | 1 mm |
| Metal Layers | β | Up to 8 |
| Internal Frequency (max) | β | 333 MHz |
| Propagation Delay | β | 1.69 ns |
| Operating Temperature | β | 0 Β°C to 85 Β°C |
| Logic Family | β | CMOS |
| I/O Standards Supported | β | True-LVDS, LVPECL, PCML, HyperTransport |
| Configuration Method | β | SRAM-based (Altera Quartus II) |
| Lead-Free | β | unknown |