EP2A40B652C9 vs EP2A25B652C9 Comparison

Detailed side-by-side comparison of EP2A40B652C9 by Intel and EP2A25B652C9 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40B652C9 EP2A25B652C9
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $92.40 $105.00
Family APEX II β€”
Maximum System Gates 1.5 M (40K logic elements) β€”
Logic Elements 40,160 24,320
Embedded System Blocks Yes (dual-port RAM, ROM, CAM) β€”
Maximum User I/O Pins [DATA_NEEDED: user I/O count] β€”
Package 652-pin BGA 652-ball FineLine BGA
Process Technology 0.18 Β΅m CMOS 0.18 Β΅m CMOS
Core Voltage 1.5 V β€”
Supply Voltage (I/O) 3.3 V (multi-standard I/O supported) β€”
Operating Temperature -40C to +85C (industrial, C9 suffix) β€”
Configuration Method SRAM-based, serial/parallel, JTAG IEEE 1149.1 β€”
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS β€”
PLL Count [DATA_NEEDED: PLL count] β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level 3 (168 hours floor life) [DATA_NEEDED: moisture sensitivity level]
RoHS Status unknown [DATA_NEEDED: RoHS compliance status]
Device Family β€” APEX II (EP2A25)
Speed Grade β€” C9 (-7 commercial)
Operating Temperature Range β€” [DATA_NEEDED: commercial/industrial temperature range]
Core Voltage (VCCINT) β€” 1.8 V
I/O Voltage Standards β€” LVTTL, LVCMOS, SSTL, LVDS
Configuration Interface β€” JTAG (IEEE 1149.1), passive serial, MAX configuration scheme
Embedded Memory β€” Embedded array blocks (EABs)
Embedded Multipliers β€” Yes (DSP blocks)
Maximum User I/O β€” [DATA_NEEDED: maximum usable I/O count for 652 BGA]
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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