EP2A40B724C9 vs EP2A40B724I-9 Comparison
Detailed side-by-side comparison of EP2A40B724C9 by Altera and EP2A40B724I-9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40B724C9 | EP2A40B724I-9 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $395.38 | $605.00 |
| Series | APEX II | β |
| Logic Elements (LE) | 38,400 | β |
| Embedded RAM Bits | 655,360 (approximately 655 Kbits / 80 Kbytes) | β |
| Number of User I/O | 540 | β |
| Operating Supply Voltage | 1.425 V to 1.575 V (core) | β |
| MultiVolt I/O Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V | β |
| Package / Case | 724-BBGA, FCBGA (Flip-Chip BGA) | β |
| Supplier Device Package | 724-BGA (35x35 mm) | β |
| Mounting Type | Surface Mount | β |
| Operating Temperature | 0C to +85C | β |
| Shipping Medium | Tray | β |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: msl level] |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Architecture | LUT-based with embedded memory blocks | β |
| Typical Core Power | [DATA_NEEDED: ICCDAT typical] | β |
| Family | β | APEX II |
| Logic Elements | β | 40,000 (typical) |
| Logic Cells | β | 38400 |
| Embedded Memory Bits | β | 655360 |
| Maximum User I/O | β | 540 (per EP2A40B724 family) |
| Package | β | 724-ball FCBGA / FineLine BGA |
| Package Code | β | B724 |
| Temperature Grade | β | Industrial ('I' suffix) |
| Operating Junction Temperature | β | -40 C to +100 C (industrial) |
| Speed Grade | β | -9 (per APEX II speed bin) |
| Peak Reflow Temperature | β | 220 C |
| Core Voltage | β | 1.5 V (typical APEX II) |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL |
| Configuration Interface | β | JTAG, Passive Serial |
| PLL | β | On-chip (per APEX II architecture) |