EP2A40B724CP vs EP2A40B724I-9 Comparison

Detailed side-by-side comparison of EP2A40B724CP by Altera and EP2A40B724I-9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40B724CP EP2A40B724I-9
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $71.00 $605.00
Family APEX II APEX II
Logic Elements 40,000 40,000 (typical)
Embedded Memory Bits 655,360 bits 655360
LAB/IO Rows 540 β€”
Effective Logic Capacity 38400 LE β€”
Device Type FPGA (SRAM-based) β€”
Core Voltage 1.5 V 1.5 V (typical APEX II)
Package 724-ball FineLine BGA (FBGA) 724-ball FCBGA / FineLine BGA
I/O Standards LVTTL, LVCMOS, LVDS, PCI, HSTL, LVPECL β€”
Configuration SRAM-based, JTAG, in-system programmable β€”
PLL Count [DATA_NEEDED: PLL count] β€”
Embedded Multipliers [DATA_NEEDED: multiplier count] β€”
Operating Temperature 0C to +85C (commercial) β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
Mounting Type Surface Mount (BGA) β€”
MSL Level [DATA_NEEDED: MSL level] [DATA_NEEDED: msl level]
Logic Cells β€” 38400
Maximum User I/O β€” 540 (per EP2A40B724 family)
Package Code β€” B724
Temperature Grade β€” Industrial ('I' suffix)
Operating Junction Temperature β€” -40 C to +100 C (industrial)
Speed Grade β€” -9 (per APEX II speed bin)
Peak Reflow Temperature β€” 220 C
I/O Standards Supported β€” LVTTL, LVCMOS, PCI, SSTL
Configuration Interface β€” JTAG, Passive Serial
PLL β€” On-chip (per APEX II architecture)

Datasheets & Resources

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