EP2A40F672C6 vs EP2A40F672C9 Comparison

Detailed side-by-side comparison of EP2A40F672C6 by Altera and EP2A40F672C9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40F672C6 EP2A40F672C9
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $105.00 $62.00
Family APEX II APEX II
Device EP2A40 β€”
Logic Elements (typical) 40,000 β€”
Maximum System Gates [DATA_NEEDED: maximum system gates] β€”
Embedded System Blocks (ESBs) [DATA_NEEDED: ESB count] β€”
Maximum User I/O Pins [DATA_NEEDED: max user I/O count] β€”
Package 672-ball FineLine BGA (FBGA-672) 672-BBGA, FC-FBGA (FineLine)
Speed Grade C6 (commercial) β€”
Operating Temperature Commercial (0C to +85C) 0 Β°C to 85 Β°C (commercial)
Process Technology 0.18-micron CMOS 0.15 Β΅m all-layer copper, up to 8 metal layers
Configuration Memory SRAM-based β€”
JTAG Support Yes (IEEE 1149.1) β€”
PLL Support Yes β€”
Mounting Type Surface Mount (BGA) Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] β€”
Lifecycle Obsolete / EOL (per Intel/Altera product discontinuation notice) β€”
Device Family β€” APEX II PLD
Logic Elements / Cells β€” 38,400
System Gates β€” 1.5 M
Macros β€” 2,560
User I/Os β€” 492
Number of Pins β€” 672
Package Size β€” 27 mm Γ— 27 mm, 1 mm ball pitch
Core Voltage β€” 1.5 V
Logic Family β€” CMOS
Propagation Delay β€” 1.55 ns
Internal Speed Grade β€” 366 MHz
I/O Standards Supported β€” True-LVDS, LVPECL, PCML, HyperTransport

Datasheets & Resources

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