EP2A40F672C6N vs EP2A40F1020C7N Comparison

Detailed side-by-side comparison of EP2A40F672C6N by Intel and EP2A40F1020C7N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40F672C6N EP2A40F1020C7N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $165.00 $198.00
Family APEX II APEX II
Logic Elements 40,000 38,400
Maximum System Gates 1,125,000 β€”
Embedded RAM Bits 442,368 β€”
Embedded System Blocks (ESBs) 160 β€”
Maximum User I/O Pins [DATA_NEEDED: maximum user I/O count] β€”
Core Voltage 1.5 V β€”
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V β€”
Package 672-ball FineLine BGA FC-FBGA-1020, 33 Γ— 33 mm, 1.0 mm pitch, fine-line
Operating Temperature Commercial (0C to +85C) 0 Β°C to +85 Β°C (commercial, C7 grade)
Speed Grade C6 (per part number suffix) β€”
Configuration Methods Passive Serial, Passive Parallel, JTAG β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS compliance status] β€”
Process Technology SRAM-based, 0.18 um (per family datasheet) β€”
PLL Count [DATA_NEEDED: PLL count] β€”
Technology β€” 0.15 Β΅m all-layer copper CMOS, up to 8 metal layers
System Gates β€” 1,500,000 (1.5 M)
Embedded Memory β€” ESB-based, 504 Kbits total
Maximum Internal Performance β€” 562 MHz
Propagation Delay β€” 1.55 ns
User I/O Pins β€” 735
PLLs β€” 4
Clock Networks β€” 12
True-LVDS Data Rate β€” 1 Gbps
Supported I/O Standards β€” True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL
Core Supply Voltage β€” 1.5 V nominal (1.425 V – 1.575 V)
Logic Family β€” CMOS
Terminal Form β€” BGA ball (flip-chip)

Datasheets & Resources

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