EP2A40F672C6N vs EP2A40F672C6 Comparison
Detailed side-by-side comparison of EP2A40F672C6N by Intel and EP2A40F672C6 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40F672C6N | EP2A40F672C6 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $165.00 | $105.00 |
| Family | APEX II | APEX II |
| Logic Elements | 40,000 | β |
| Maximum System Gates | 1,125,000 | [DATA_NEEDED: maximum system gates] |
| Embedded RAM Bits | 442,368 | β |
| Embedded System Blocks (ESBs) | 160 | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | [DATA_NEEDED: maximum user I/O count] | [DATA_NEEDED: max user I/O count] |
| Core Voltage | 1.5 V | β |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V | β |
| Package | 672-ball FineLine BGA | 672-ball FineLine BGA (FBGA-672) |
| Operating Temperature | Commercial (0C to +85C) | Commercial (0C to +85C) |
| Speed Grade | C6 (per part number suffix) | C6 (commercial) |
| Configuration Methods | Passive Serial, Passive Parallel, JTAG | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Process Technology | SRAM-based, 0.18 um (per family datasheet) | 0.18-micron CMOS |
| PLL Count | [DATA_NEEDED: PLL count] | β |
| Device | β | EP2A40 |
| Logic Elements (typical) | β | 40,000 |
| Configuration Memory | β | SRAM-based |
| JTAG Support | β | Yes (IEEE 1149.1) |
| PLL Support | β | Yes |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| Lifecycle | β | Obsolete / EOL (per Intel/Altera product discontinuation notice) |