EP2A40F672C9 vs EP2A40F672C8N Comparison

Detailed side-by-side comparison of EP2A40F672C9 by Altera and EP2A40F672C8N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2A40F672C9 EP2A40F672C8N
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $62.00 $122.00
Family APEX II APEX II
Device Family APEX II PLD β€”
Logic Elements / Cells 38,400 38,400
System Gates 1.5 M 1.5 M
Macros 2,560 β€”
User I/Os 492 492
Number of Pins 672 β€”
Package 672-BBGA, FC-FBGA (FineLine) β€”
Package Size 27 mm Γ— 27 mm, 1 mm ball pitch β€”
Core Voltage 1.5 V β€”
Process Technology 0.15 Β΅m all-layer copper, up to 8 metal layers β€”
Logic Family CMOS CMOS
Propagation Delay 1.55 ns 1.55 ns
Internal Speed Grade 366 MHz β€”
Operating Temperature 0 Β°C to 85 Β°C (commercial) β€”
I/O Standards Supported True-LVDS, LVPECL, PCML, HyperTransport β€”
Mounting Type Surface Mount β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Series β€” EP2A40
Maximum Operating Frequency β€” 376 MHz
Technology Node β€” 0.15 Β΅m
Process Feature β€” All-layer copper, up to 8 metal layers
Nominal Supply Voltage (VCCINT) β€” 1.5 V
Supply Voltage Range β€” 1.425 V to 1.575 V
Number of Pins / Balls β€” 672
Package Type β€” FC-FBGA (FineLine BGA)
Package Dimensions β€” 27 x 27 mm
Ball Pitch β€” 1.0 mm
LVDS Data Rate β€” 1 Gbps
Embedded PLLs β€” 4
Programming Interface β€” JTAG (IEEE 1149.1)
Operating Temperature (Commercial) β€” 0 Β°C to 85 Β°C
Speed Grade β€” C8

Datasheets & Resources

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