EP2A40F672I7 vs EP2A40F672C7 Comparison
Detailed side-by-side comparison of EP2A40F672I7 by Altera and EP2A40F672C7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2A40F672I7 | EP2A40F672C7 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $185.00 | $195.00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | 38,400 |
| Maximum System Gates | 1,500,000 | β |
| Maximum User I/O | [DATA_NEEDED: max user I/O pins for F672 package] | 492 |
| Core Voltage (VCCINT) | 1.5 V | β |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO supported levels] | β |
| Process Technology | 0.15 Β΅m CMOS | 0.15 Β΅m CMOS, all-layer copper, up to 8 metal layers |
| Core Frequency (max) | 562 MHz | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial) | β |
| Package | 672-ball FC-FBGA | 672-ball FC-FBGA (FineLine BGA) |
| Package Family | Fine-pitch Chip-scale BGA | β |
| Mounting Type | Surface Mount | Surface Mount |
| Speed Grade | -7 (speed grade 7) | β |
| Moisture Sensitivity Level (MSL) | 3 | β |
| Peak Reflow Temperature | 220 Β°C | β |
| Configuration Method | JTAG / Passive Serial / Active Serial | β |
| RoHS Status | unknown | Compliant |
| System Gates | β | 1,500,000 |
| Macro Cells | β | 2,560 |
| Core Voltage | β | 1.5 V |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Pin-to-Pin Delay | β | 1.55 ns (C7 speed grade) |
| Maximum Internal Frequency | β | 562 MHz |
| High-Speed Interface | β | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| PLLs | β | 4 |
| Package Dimensions | β | 27 x 27 mm, 1.0 mm pitch |
| Operating Temperature Grade | β | Commercial (per 'C' suffix in speed grade) |
| Lead-Free | β | Yes |