EP2A70B652C7 vs EP20K600CB652I7 Comparison
Detailed side-by-side comparison of EP2A70B652C7 by Intel and EP20K600CB652I7 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K600CB652I7
EP20K600CB652I7 - 600K Gate APEX 20KC FPGA BGA-652 | Intel
EP20K600CB652I7 ObsoleteSpecification Comparison
| Parameter | EP2A70B652C7 | EP20K600CB652I7 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.51 | $149.00 |
| Manufacturer | Intel (formerly Altera) | Intel (formerly Altera) |
| Series | APEX II | β |
| Family | APEX II (Field-Programmable Gate Array) | APEX 20KC |
| Logic Elements (LEs) | 67200 | β |
| Typical Gates | 1140000 | β |
| Maximum User I/Os | 336 | β |
| Package Type | BGA-652 (FineLine BGA) | β |
| Package Size | 27 mm x 27 mm (approximate) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C) | β |
| Speed Grade | 7 | -7 |
| Core Voltage | 1.8 V | β |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (bank-dependent) | β |
| Configuration Interface | JTAG, Passive Serial | β |
| Memory Type | Embedded SRAM blocks (ESBs) | β |
| PLL / Clock Management | Yes, dedicated PLL blocks | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Technology | β | 0.15 Β΅m CMOS, SRAM-based |
| System Gates | β | 600,000 |
| Logic Elements | β | 24,320 |
| Maximum Internal Frequency | β | 375.94 MHz |
| Propagation Delay | β | 1.6 ns |
| Core Supply Voltage | β | 1.8 V (1.71 V to 1.89 V range) |
| User I/O Count | β | 488 (4 dedicated inputs + 480 I/O) |
| Number of Outputs | β | 480 |
| Package | β | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) |
| Operating Temperature | β | -40 Β°C to +85 Β°C (industrial, 'I' suffix) |
| Programming Interface | β | JTAG (IEEE 1149.1), in-system programmable |
| Embedded Memory | β | ESBs configurable as dual-port RAM / ROM / CAM |
| MultiVolt I/O Support | β | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks |