EP2A70B724C7 vs EP2A70B724I9 Comparison
Detailed side-by-side comparison of EP2A70B724C7 by Intel and EP2A70B724I9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2A70B724C7
EP2A70B724C7 - 3M-Gate APEX II FPGA | Intel | Embedded Logic
EP2A70B724C7 UnknownSpecification Comparison
| Parameter | EP2A70B724C7 | EP2A70B724I9 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Unknown | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $160.00 |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| Family | APEX II | APEX II |
| Gate Count | 3,000,000 gates | β |
| Logic Cells | 67,200 cells | β |
| I/O Count | 540 I/O | β |
| Configuration or Memory Capacity | [DATA_NEEDED: exact embedded-memory or configuration-memory capacity] | β |
| Supply Voltage | 1.5 V | β |
| Maximum Frequency | 420 MHz | β |
| Fabrication Process | 0.15 Β΅m | β |
| Loadable PLD Timing | 2.17 ns | β |
| Technology | CMOS | β |
| Package | 724-pin FCBGA, 724-BBGA, or PBGA724 | 724-pin FCBGA (Flip-Chip BGA) |
| Package Body Size | 35 mm x 35 mm | β |
| Package Pitch | 1.27 mm | β |
| Interface Capabilities | True-LVDS, LVPECL, PCML, and HyperTransport | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | unknown | β |
| AEC-Q100 Status | unknown | β |
| Lead-Free Status | unknown | β |
| Operating Temperature | [DATA_NEEDED: operating-temperature range] | β |
| Logic Elements | β | 67,200 |
| System Gates | β | Approximately 3,000,000 |
| Embedded Memory | β | 540 Kbits (1,146,880 bits total ESB memory per Jotrin listing) |
| Process Technology | β | 0.15 Β΅m CMOS |
| Core Voltage | β | 1.5 V |
| Maximum Operating Frequency | β | 198 MHz |
| Number of PLLs | β | 4 |
| Embedded System Blocks (ESBs) | β | 4 |
| Operating Temperature Grade | β | Industrial (-40C to +100C) |
| Mounting Type | β | Surface Mount |
| I/O Standards Supported | β | LVTTL, LVCMOS, SSTL, HSTL, LVDS |
| Configuration Mode | β | SRAM-based, configurable via JTAG or EPC enhanced configuration devices |