EP2AGX125EF35I5N vs EP2AGX125EF35C4G Comparison
Detailed side-by-side comparison of EP2AGX125EF35I5N by Intel and EP2AGX125EF35C4G by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2AGX125EF35I5N - Arria II GX FPGA 118K LE, 6x 3.125G Transceivers | Intel
EP2AGX125EF35I5N β ActiveIntel
EP2AGX125EF35C4G - Arria II GX FPGA, 118K LEs, 1152-FCBGA | Intel
EP2AGX125EF35C4G β Last Time BuySpecification Comparison
| Parameter | EP2AGX125EF35I5N | EP2AGX125EF35C4G |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,390.00 | $1,290.00 |
| Family | Arria II GX | Arria II GX |
| Device Logic Elements | 118,143 | β |
| Combinational Logic Blocks (CLBs) | 124,100 | β |
| Logic Array Blocks (LABs) | 4,964 | β |
| User I/Os | 452 | β |
| Embedded Memory | 8.4 Mbit (M9K + MLAB) | β |
| DSP Blocks (18x18 Multipliers) | 252 | β |
| Transceivers | 6 (up to 3.125 Gbps) | β |
| PLLs | 4 | β |
| Process Technology | 40 nm CMOS | 40 nm |
| Core Supply Voltage | 0.9 V | β |
| Speed Grade | I5 (industrial, fastest) | C4 |
| Operating Temperature | -40C to +100C (industrial) | 0C to +85C (Commercial) |
| Package | 1152-ball FC-FBGA, 35 x 35 mm | 1152-ball FC-FBGA (Flip-Chip) |
| Mounting Type | Surface Mount (flip-chip BGA) | Surface Mount |
| Lead-Free / RoHS | Lead-Free per MS-034 | β |
| PCI Express Hard IP | Gen1 x1/x4 endpoint | Gen1/Gen2 x1/x4/x8 |
| Configuration Schemes | AS, PS, JTAG, FPP | β |
| Logic Elements | β | 118,143 |
| Embedded Memory Bits | β | 8,315,904 |
| Memory Blocks (M9K) | β | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | β | 452 |
| DSP Blocks | β | [DATA_NEEDED: DSP block count] |
| Transceiver Channels | β | 12 |
| Maximum Transceiver Data Rate | β | 6.375 Gbps |
| Core Voltage | β | 0.9 V |
| User I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| Maximum User I/O | β | [DATA_NEEDED: max user I/O count] |
| Configuration Method | β | SRAM-based, PS/FPP/JTAG |
| RoHS Status | β | Compliant |
| Lead-Free | β | Yes |