EP2AGX95EF35C6G vs EP2AGX95EF35C4G Comparison
Detailed side-by-side comparison of EP2AGX95EF35C6G by Intel and EP2AGX95EF35C4G by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP2AGX95EF35C4G
EP2AGX95EF35C4G - Arria II GX FPGA 95K LE FCBGA-1152 | Intel
EP2AGX95EF35C4G β ActiveSpecification Comparison
| Parameter | EP2AGX95EF35C6G | EP2AGX95EF35C4G |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $1,555.00 |
| Device Type | Field Programmable Gate Array (FPGA) | β |
| Product Family | Arria II GX | β |
| Logic Elements | 89,178 | β |
| Embedded Memory | 6,839,296 bits | β |
| User I/O | 452 | β |
| Package | 1152-BBGA, FCBGA | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch |
| Package Type | Ball Grid Array | β |
| Manufacturer | Altera / Intel | β |
| Core Voltage | [DATA_NEEDED: core voltage] | 0.9 V nominal |
| Operating Temperature | [DATA_NEEDED: operating temperature] | 0C to +85C (commercial) |
| Maximum Clock Frequency | [DATA_NEEDED: maximum clock frequency] | β |
| Transceiver Count | [DATA_NEEDED: transceiver count] | β |
| Transceiver Data Rate | [DATA_NEEDED: transceiver data rate] | β |
| Power Dissipation | [DATA_NEEDED: power dissipation] | β |
| Package Dimensions | [DATA_NEEDED: package dimensions] | β |
| Ball Pitch | [DATA_NEEDED: ball pitch] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | β |
| Family | β | Arria II GX |
| Logic Elements (LE) | β | 89,178 |
| Adaptive Logic Modules (ALM) | β | [DATA_NEEDED: ALM count from datasheet] |
| Embedded Memory Bits | β | 6,839,296 bits (~6.5 Mbit) |
| Embedded Memory Blocks (M9K/M144K) | β | [DATA_NEEDED: block count from datasheet] |
| Embedded 18x18 Multipliers | β | 616 |
| User I/Os | β | 452 |
| Transceiver Blocks | β | 4 (up to 3.75 Gbps) |
| PCIe Hard IP | β | Gen1/Gen2 (x1/x2/x4) |
| PLLs | β | 4 |
| Global Clock Networks | β | [DATA_NEEDED: per Arria II family datasheet] |
| Process Technology | β | 40 nm TSMC low-power |
| Speed Grade | β | -4 (mid-speed) |
| Configuration Mode | β | Passive Serial, Fast Passive Parallel, JTAG |