EP2AGZ300FF35C4G vs EP2AGZ300FF35C4N Comparison
Detailed side-by-side comparison of EP2AGZ300FF35C4G by Intel and EP2AGZ300FF35C4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2AGZ300FF35C4G | EP2AGZ300FF35C4N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2,240.00 | $1,350.00 |
| Family | Arria II GZ | β |
| Logic Elements | 300,000 | 298,000 |
| Adaptive Logic Modules (ALMs) | 119,000 | β |
| Embedded Memory | 16,624 Kbit (M9K + M144K) | β |
| Embedded 18x18 Multipliers | 736 | β |
| User I/O Pins | 554 | β |
| Transceivers | 12 channels | Multi-gigabit transceivers integrated |
| Max Transceiver Data Rate | 6.375 Gbps (C4 speed grade) | β |
| Package | 1152-ball FineLine BGA (FBGA-1152), 35x35 mm | β |
| Operating Temperature | 0Β°C to +85Β°C (commercial C4 grade) | β |
| Speed Grade | 4 | β |
| Process Technology | 40 nm TSMC | 40 nm |
| Core Voltage | 0.85 V to 1.1 V | 0.9 V |
| PLLs | 8 (up to 4 per quadrant) | [DATA_NEEDED: PLL count] |
| Global Clock Networks | 16 | β |
| PCIe Hard IP | PCIe Gen2 x4 | β |
| Hard Memory Controller | DDR3 up to 800 MHz | β |
| Configuration | Passive Serial, Fast Passive Parallel, JTAG | β |
| RoHS Status | Compliant | Compliant (per Besenchips / DigiKey listing) |
| MSL Level | 3 (168 hours) | β |
| Series | β | Arria II GZ |
| Logic Array Blocks (LABs) | β | 11,920 |
| Embedded Memory (bits) | β | 18,854,912 (~17.9 Mbit) |
| User I/O Count | β | 554 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Package Type | β | 1152-BBGA, FCBGA (flip-chip) |
| Terminal Form | β | Ball |
| Package Code (JEDEC) | β | HBGA |
| Operating Temperature Grade | β | Commercial (C4 = 0C to +85C) |
| Configuration Memory | β | SRAM-based (volatile, requires boot device) |
| DSP Blocks | β | [DATA_NEEDED: number of DSP blocks] |
| Lead-Free Status | β | Lead free (per Besenchips listing) |
| Mounting Type | β | Surface Mount |
| Maximum Operating Frequency | β | 500 MHz |