EP2C50F672C8 vs EP2C50F672I8N Comparison
Detailed side-by-side comparison of EP2C50F672C8 by Intel and EP2C50F672I8N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2C50F672C8 | EP2C50F672I8N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $155.40 | $248.42 |
| Family | Cyclone II | β |
| Logic Elements (LE) | 50,528 | β |
| Configurable Logic Blocks (CLBs / LABs) | 3,158 | β |
| Embedded Memory (M4K blocks) | 594 Kbits (129 M4K blocks) | β |
| Embedded Multipliers (18x18) | 86 | β |
| Phase-Locked Loops (PLLs) | 4 | β |
| Maximum User I/O Pins | 450 | β |
| Global Clock Networks | 16 | [DATA_NEEDED: global clock network count] |
| Process Technology | 90 nm CMOS, 1.2 V core | β |
| Maximum Internal Frequency | 402.58 MHz | β |
| Operating Temperature | 0 Β°C to +85 Β°C (commercial) | β |
| Package | 672-pin FBGA (FineLine BGA), 27 x 27 mm | β |
| Speed Grade | 8 | β |
| Configuration Mode | Active Serial (AS), Passive Serial (PS), JTAG, Fast Passive Parallel (FPP) | β |
| Mounting Type | Surface Mount, BGA | Surface mount BGA |
| MSL Level | 3 (168 hours) | β |
| RoHS Status | Compliant (lead-free FBGA) | unknown |
| Product Type | β | Field Programmable Gate Array (FPGA) |
| Device Family | β | Cyclone II |
| Logic Technology | β | CMOS |
| Logic Elements | β | 50,528 |
| Embedded Memory | β | 594,432 bits |
| User I/O | β | 450 |
| Supply Voltage | β | 1.2 V |
| Package Type | β | 672-BGA |
| Package Designation | β | FBGA-672 |
| Pin Count | β | 672 |
| Ordering Temperature Grade | β | I8N industrial grade designation |
| Configuration Method | β | [DATA_NEEDED: configuration mode] |
| Operating Temperature Range | β | [DATA_NEEDED: operating temperature range] |
| Embedded Multipliers | β | [DATA_NEEDED: embedded multiplier count] |
| Phase-Locked Loops | β | [DATA_NEEDED: PLL count] |
| REACH Status | β | unknown |