EP2S130F1020C5N vs EP2S130F1020C5ES Comparison

Detailed side-by-side comparison of EP2S130F1020C5N by Intel and EP2S130F1020C5ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S130F1020C5N EP2S130F1020C5ES
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $1,320.00 $1,380.00
Family Stratix II Stratix II
Logic Elements 132,540 132,540
Adaptive Logic Modules (ALMs) 6627 LABs (per Jotrin listing) 53,016
Total Memory Bits 6,747,840 bits β€”
User I/Os 734 β€”
Process Technology 90 nm 90 nm
Core Supply Voltage (VCCINT) 1.15 V to 1.25 V β€”
Maximum Internal Frequency 609.76 MHz β€”
Package 1020-ball FC-FBGA (33x33 mm) 1020-ball FC-FBGA (flip-chip BGA)
Mounting Type Surface Mount Surface Mount
Operating Temperature Commercial (0C to +85C, C5 grade) β€”
Temperature Grade C5 (other - per Partstack) β€”
RoHS Status [DATA_NEEDED: rohs status] Compliant (lead-free)
Lead-Free [DATA_NEEDED: lead-free status] β€”
PLLs 4 (typical Stratix II feature) [DATA_NEEDED: PLL count]
Global Clock Networks 16 (typical Stratix II feature) β€”
Configuration Method Serial/Parallel via Quartus II (typical Stratix II) β€”
Country of Origin Republic of Korea (per GlobalSpec) β€”
ECCN 3A001.a.7.a (per GlobalSpec) β€”
Estimated EOL Date 2023 (per GlobalSpec) β€”
Embedded Memory Bits β€” 6,747,840
Maximum User I/Os β€” 742
Core Voltage β€” 1.2 V
Maximum Internal Clock Frequency β€” 609.76 MHz
Speed Grade β€” -5
Operating Temperature (Junction) β€” 0C to 85C (commercial)
Logic Array Blocks (LABs) β€” 6,747
Total RAM Blocks β€” [DATA_NEEDED: total RAM blocks]
Embedded DSP Blocks β€” [DATA_NEEDED: embedded DSP blocks count]
Embedded 18x18 Multipliers β€” [DATA_NEEDED: 18x18 multiplier count]
Configuration β€” SRAM-based, JTAG/AS/PS modes

Datasheets & Resources

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