EP2S130F1020I4 vs EP2S130F1020C5N Comparison
Detailed side-by-side comparison of EP2S130F1020I4 by Intel and EP2S130F1020C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2S130F1020I4 | EP2S130F1020C5N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,395.00 | $1,320.00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 132,540 | 132,540 |
| Equivalent LEs | ~180,000 | β |
| Adaptive Logic Modules (ALMs) | 53,016 | 6627 LABs (per Jotrin listing) |
| Embedded Memory (bits) | 6,747,840 | β |
| Embedded Memory (M512 blocks) | 530 | β |
| Embedded Memory (M4K blocks) | 768 | β |
| Embedded Memory (M-RAM blocks) | 4 | β |
| Embedded 18x18 Multipliers | 504 | β |
| DSP Blocks | 48 | β |
| User I/O Pins | 742 | β |
| User I/O Banks | 12 | β |
| Package | 1020-ball FC-FBGA (33x33 mm) | 1020-ball FC-FBGA (33x33 mm) |
| Process Node | 90 nm CMOS, all-layer copper | β |
| Core Voltage (VCCINT) | 1.2 V | β |
| Speed Grade | I (industrial performance) | β |
| Device Revision | 4 | β |
| Operating Junction Temperature | -40C to +100C (industrial) | β |
| Configuration Scheme | Fast Passive Parallel x8, Passive Serial, JTAG | β |
| Mounting Type | Surface Mount (FC-FBGA) | Surface Mount |
| RoHS Status | Compliant (per distributor listings) | [DATA_NEEDED: rohs status] |
| Total Memory Bits | β | 6,747,840 bits |
| User I/Os | β | 734 |
| Process Technology | β | 90 nm |
| Core Supply Voltage (VCCINT) | β | 1.15 V to 1.25 V |
| Maximum Internal Frequency | β | 609.76 MHz |
| Operating Temperature | β | Commercial (0C to +85C, C5 grade) |
| Temperature Grade | β | C5 (other - per Partstack) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| PLLs | β | 4 (typical Stratix II feature) |
| Global Clock Networks | β | 16 (typical Stratix II feature) |
| Configuration Method | β | Serial/Parallel via Quartus II (typical Stratix II) |
| Country of Origin | β | Republic of Korea (per GlobalSpec) |
| ECCN | β | 3A001.a.7.a (per GlobalSpec) |
| Estimated EOL Date | β | 2023 (per GlobalSpec) |